The invention relates to a current source for generating a constant reference current, in particular for application specific integrated circuits in CMOS technology.
Constant-current sources are provided for supplying a current which, besides being largely independent of operating voltage changes, temperature changes and long-term changes, is independent of the output voltage. Constant-current sources therefore have a very high internal resistance.
In integrated circuits analogue reference current sources are: frequently used for generating bias currents. Current sources of highly diverse designs are known. A constant-current source may be realized as an active two-terminal network having an internal resistance of Ri=∞ by means of negative current feedback or as an active two-terminal network with a regulated clamping current. Constant-current sources also include what are known as current mirror circuits. Current mirrors are an electronic circuit having transistors which serve to generate constant currents from a reference current. Current mirror circuits can be constructed from bipolar transistors or from MOS field-effect transistors, the base or GATE terminals of the two transistors in each case being connected to one another.
In many technical applications, it is important to generate a bias current IBIAS which is independent of fluctuations in the supply voltage. It is important, therefore, that the current source for generating the reference currents or bias currents has a relatively low sensitivity toward fluctuations in the supply voltage VDD. A low supply voltage sensitivity of the reference current source is an important prerequisite for many applications, for example for amplifiers, comparators or oscillators which receive the generated reference current. The oscillator of a phase locked loop PLL generates a signal frequency that is as far as possible independent of the supply voltage. The frequency changes of the phase locked loop brought about by supply voltage fluctuations lead to undesirable jitter of the output signal.
Application specific integrated circuits ASICs in many cases have both a digital circuit section and an analogue circuit section. In this case, the reference current source is integrated within the analogue circuit and generates reference or constant currents for various analogue circuit components, such as, for example, amplifiers, comparators or oscillators. The digital circuit section of the application specific integrated circuit ASIC is clocked with a synchronous clock signal. Both the analogue circuit section and the digital circuit section receive an external supply voltage and are coupled to one another via common power supply lines. What is more, both the analogue circuit section and the digital circuit section are integrated on the same substrate. Supply voltage fluctuations brought about by switching operations in the digital circuit section (spikes) are transmitted to the analogue circuit section via the supply voltage lines. Furthermore, noise brought about by the switching operations within the digital circuit section is transmitted via the common substrate to the analogue circuits, in particular the analogue constant-current source. Therefore, a high PSRR (power supply rejection ratio) of the constant-current source is necessary as the degree of integration increases.
                    PSS        =                                                            Δ                ⁢                                                                  ⁢                                  I                  OUT                                                            I                OUT                                                    Δ              ⁢                                                          ⁢                              V                DD                                              ⁢                                          [                      %            /            volts                    ]                                    (        1        )            where PSS denotes the power supply sensitivity,                IOUT denotes the output current of the current source and        VDD denotes the supply voltage of the current source.        
The lower the power supply sensitivity PSS, the less sensitive the current source is toward fluctuations in the supply voltage VDD.
The sensitivity PSS of the current source toward fluctuations in the supply voltage is determined by the circuitry construction of the current source.
FIG. 1 shows a current source which is also referred to as a bootstrapped current source. This current source is described for example in R. L. Geiger, P. E. Allen, N. R. Strader: “VLSI design techniques for analog and digital circuits”, McGraw-Hill, International Edition 1990, pages 363–365. The bootstrapped current source BSQ according to the prior art as is shown in FIG. 1 generates a constant reference current (IBIAS) It has two supply voltage terminals VDD and VSS. The negative supply voltage terminal VSS is connected to ground GND, for example. The current source BSQ contains an amplifier circuit AMP having two complementary MOSFET transistors (P1, N1). The GATE of the MOSFET transistor N1 is connected to an input E of the amplifier circuit AMP. The amplifier circuit AMP has an output A, which is connected to the GATE of a MOSFET field-effect transistor N2. The MOSFET transistor N2 forms a voltage/current converter which generates a current I2 in a manner dependent on the amplifier output voltage. The current I2 flows away through a resistor R1 to the negative supply voltage terminal VSS. As a result, a negative feedback voltage VR1 is dropped across the resistor R1. Said negative feedback voltage VG is applied to the input E of the amplifier circuit AMP. The current I2 flowing through the voltage/current converter N2 flows through a complementary PMOS field-effect transistor P2, which mirrors the current I2 on the one hand via the PMOS transistor P1 and on the other hand via the PMOS transistor POUT. The mirroring has the effect that the currents I1, I2 and the generated reference current IOUT are equal:I1=I2=IOUT  (2)
The current source illustrated in FIG. 1 operates with a negative feedback voltage V6 across the resistor R1, via which the operating point of the current source is adjustable. The rise in the negative feedback voltage V6 decreases the output voltage VA (present at the output A) of the amplifier AMP in amplified fashion on account of the inverting of the amplifier AMP.VA=−K*VG,  (3)
The field-effect transistor N2 forms a SOURCE follower, so that the voltage present across the resistor R1 decreases to the same extent as the output voltage of the amplifier AMP.V6=−K′*VA(K′≈1)  (4)
The two MOSFET transistors N1, N2 in each case operate in the saturation region, the currents I1, I2 flowing through being equal in magnitude on account of the current mirroring.
The output voltage of the amplifier circuit AMP results from the sum of the two GATE-SOURCE voltages of the MOSFET transistors N1, N2:VA=VGS N1+VGS N2  (5)
The output voltage of the amplifier circuit VA thus results as:VA=VT1+ΔV1+VT2+ΔV2  (6)where                VT1 denotes the threshold voltage of the MOS transistor N1,            VT2 denotes the threshold voltage of the MOS transistor N2,    ΔV1 denotes the overdrive voltage of the transistor N1 and    ΔV2 denotes the overdrive voltage of the transistor N2.
In the saturation region, it furthermore holds true that:
                              Δ          ⁢                                          ⁢          V1                =                              I1                          K1              ⁢                              W1                L1                                                                        (        7        )                                          Δ          ⁢                                          ⁢          V2                =                              I2                          K2              ⁢                              W2                L2                                                                        (        8        )            where I1, I2 denote the currents flowing through the transistors N1, N2,    K1, K2 denote the transconductance of the transistors N1, N2,    W1, W2 denote the channel widths of the transistors N1, N2, and    L1, L2 denote the channel lengths of the transistors N1, N2.
The DRAIN-SOURCE voltage at the PMOS field-effect transistor P1 results from the difference between the applied supply voltage VDD and the output voltage at the output A of the amplifier circuit.VDS=VDD−VA  (9)
The output voltage at the output A of the amplifier circuit amounts to approximately 1.1 V in the case of the conventional circuit illustrated in FIG. 1. For a sufficient precise current mirroring, the DRAIN-SOURCE voltage at the current mirror transistor P1 must not fall below a certain voltage, for example a voltage of 0.4 V.
FIG. 2 shows the principle of a current source coupled through by means of a negative feedback voltage from the prior art as is illustrated in FIG. 1. The mirrored current I1 is, on the one hand, a function of the current I2 which flows through the current converter N2 and which brings about a voltage drop VR1 across the resistor R1 and controls the MOSFET transistor N1. The condition that the two currents I1, I2 are identical furthermore holds true by virtue of the current mirroring at the two PMOS transistors P1, P2. The two operating points ARB1, ARB2 lie at the point of intersection of the two characteristic curves. The operating point 2 is a non-desired operating point at which the two currents I1=I2=zero. The desired operating point is the operating point ARB1, which is adjustable by means of the resistor R1.
The relationship between the two currents I1, I2 is given by the following equation:
                              I          2                =                                                            V                T1                            +                              Δ                ⁢                                                                  ⁢                                  V                  1                                                                    R              1                                =                                                    V                T1                                            R                1                                      +                                          1                                  R                  1                                            ⁢                                                                    I                    1                                                                              K                      1                                        *                                                                  W                        1                                                                    L                        1                                                                                                                                                    (        10        )            
One disadvantage of the conventional current source BSQ illustrated in FIG. 1 is that, on account of the relatively high output voltage VA required at the output A of the amplifier circuit, the required supply voltage VDD is likewise relatively high and of an order of magnitude of approximately 1.5 V.
A further disadvantage of the current source illustrated in FIG. 1 is that the sensitivity PSS toward the supply voltage fluctuations ΔVDD is relatively high and cannot be increased by additional cascading of the current mirror circuit P1, P2 and P3, Pout because this would lead to an even higher supply voltage VDD.